AU5780A Datasheet, PDF (5/12 Pages) NXP Semiconductors – SAE/J1850/VPW transceiver

Philips Semiconductors
SAE/J1850/VPW transceiver
Product data
AU5780A
CONTROL INPUT SUMMARY
TX
/LB
MODE
BIT VALUE
BUS_OUT
RX
(out)
0
0
Loop-back
TX passive (default state)
float
float (high)
1
0
Loop-back
TX active
float
low
0
1
Communication
Transmitter passive
float
bus state¹
1
1
Communication
Transmitter active
high
low
NOTE:
1. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be floating (i.e., high,
considering external pull-up resistance). Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active),
then RX will be low.
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System; operation is not guaranteed under these conditions; all voltages are referenced to pin 8
(GND); positive currents flow into the IC; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V_BATT
V_BATT.ld
V_BATT.tr1
V_BATT.tr2
V_BATT.tr3
V_B
V_B.tr1
V_B.tr2
V_B.tr3
V_I
ESD_BATT
supply voltage
short-term supply voltage
transient supply voltage
transient supply voltage
transient supply voltage
Bus voltage
transient bus voltage
transient bus voltage
transient bus voltage
DC voltage on pins TX, R/F, RX, /LB
ESD capability of BATT pin
load dump; t < 1s
SAE J1113 pulse 1
SAE J1113 pulses 2
SAE J1113 pulses 3A, 3B
R_f > 10 kΩ ; Rb >10Ω ¹
SAE J1113 pulse 1
SAE J1113 pulses 2
SAE J1113 pulses 3A, 3B
Air gap discharge,
R=2kΩ, C=150pF
–20
+24
V
+50
V
–100
V
+150
V
–200
+200
V
–20
+20
V
–50
V
+100
V
–200
+200
V
–0.3
7
V
–9
+9
kV
ESD_bus
ESD capability of BUS_OUT and BUS_IN pins Air gap discharge,
–9
+9
kV
R=2kΩ, C=150pF, R_f > 10 kW
ESD_logic
ESD capability of TX, RX, R/F, and /LB pins
Human Body,
R=1.5kΩ, C=100pF
–2
+2
kV
P_tot
maximum power dissipation
at T_amb = +125 °C
164
Θ_JA
thermal impedance
152
T_amb
operating ambient temperature
–40
+125
T_stg
storage temperature
–40
+150
T_vj
junction temperature
–40
+150
T_LEAD
Lead temperature
Soldering, 10 seconds maximum
265
I_CL(BUS)
Bus output clamp current
No latch-up, |V_BUS| = 25 V
100
I_CL(BATT)
Battery clamp current
No latch-up or snap back,
100
|V_BATT| = 25 V
NOTE:
1. For bus voltages –20V < V_bus < –17V and +17V < V_bus < +20V the current is limited by the external resistors R_b and R_f.
mW
°C/W
°C
°C
°C
°C
mA
mA
2001 Jun 19
5