74HC175 Datasheet, PDF (5/13 Pages) NXP Semiconductors – Quad D-type flip-flop with reset; positive-edge trigger

Philips Semiconductors
Quad D-type flip-flop with reset; positive-edge trigger
Product specification
74HC/HCT175
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
CP to Q_n, Q_n
t_PHL/ t_PLH propagation delay
MR to Q_n, Q_n
t_THL/ t_TLH output transition time
t_W
clock pulse width
80
HIGH or LOW
16
14
t_W
master reset pulse width 80
LOW
16
14
t_rem
removal time
5
MR to CP
5
5
t_su
set-up time
80
D_n to CP
16
14
t_h
hold time
25
CP to D_n
5
4
f_max
maximum clock pulse 6.0
frequency
30
35
55 175
20 35
16 30
50 150
18 30
14 26
19 75
7 15
6 13
22
8
6
19
7
6
−33
−12
−10
3
1
1
2
0
0
25
75
89
220
44
37
190
38
33
95
19
16
100
20
17
100
20
17
5
5
5
100
20
17
30
6
5
4.8
24
28
265
53
45
225
45
38
110
22
19
120
24
20
120
24
20
5
5
5
120
24
20
40
8
7
4.0
20
24
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
MHz 2.0
4.5
6.0
Fig.6
Fig.8
Fig.6
Fig.6
Fig.8
Fig.8
Fig.7
Fig.7
Fig.6
1998 Jul 08
5