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74F393 Datasheet, PDF (5/8 Pages) NXP Semiconductors – Dual 4-bit binary ripple counter
Philips Semiconductors
Dual 4-bit binary ripple counter
Product specification
74F393
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
tW(H)
tW(L)
tW(H)
tREC
CPn Pulse width
High or Low
MR Pulse width
High
Recovery time
MR to CPn
TEST
CONDITION
Waveform 1
Waveform 2
Waveform 2
LIMITS
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500Ω
MIN TYP MAX
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500Ω
MIN
MAX
4.5
5.0
3.5
4.0
3.5
4.5
2.5
3.0
UNIT
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
1/fMAX
CPn
VM
VM
tw(L)
tw(H)
tPHL
tPLH
Qna, Qnb
VM
VM
SF00709
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
MR
VM
VM
tw(H)
trec
CPn
VM
tPHL
Qna, Qnb
VM
SF00708
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery Time
TEST CIRCUIT AND WAVEFORMS
VIN
PULSE
GENERATOR
VCC
VOUT
D.U.T.
NEGATIVE
PULSE
90%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
90%
AMP (V)
0V
RT
CL RL
Test Circuit for Totem-Pole Outputs
POSITIVE
PULSE
10%
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
Input Pulse Definition
family
74F
INPUT PULSE REQUIREMENTS
amplitude VM rep. rate
tw
tTLH
3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00006
1988 Nov 01
5