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SAA7371 Datasheet, PDF (47/60 Pages) NXP Semiconductors – Digital servo processor and Compact Disc decoder CD7
Philips Semiconductors
Digital servo processor and
Compact Disc decoder (CD7)
Product specification
SAA7371
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Digital input/output
INPUT/OUTPUT: SDA [CMOS INPUT/OPEN-DRAIN I2C-BUS OUTPUT (WITH PROTECTION DIODE TO VDD)]
VIL
LOW level input voltage
−0.3
−
0.3VDD V
VIH
HIGH level input voltage
0.7VDD −
VDD + 0.3 V
IZO
3-state leakage current
Vi = 0 − VDD
−10
−
+10
µA
Cin
input capacitance
−
−
10
pF
VOL
LOW level output voltage
IOL = 2 mA
0
−
0.4
V
Io
output current
−
−
4
mA
CL
load capacitance
−
−
50
pF
tf
output fall time
CL = 20 pF;
−
−
15
ns
(VDD − 0.8) − 0.8
Crystal oscillator
INPUT: CRIN (EXTERNAL CLOCK)
VIL
LOW level input voltage
VIH
HIGH level input voltage
ILI
input leakage current
CI
input capacitance
−0.3
−
0.7VDD −
−10
−
−
−
0.3VDD V
VDD + 0.3 V
+10
µA
10
pF
OUTPUT: CROUT; see Figs 3 and 4
fxtal
crystal frequency
note 7
8
gm
mutual conductance at 100 kHz
−
GV
small signal voltage gain
GV = gm × RO
−
Cfb
feedback capacitance
−
Cout
output capacitance
−
8.4672 35
10
−
18
−
−
5
−
10
MHz
mA/V
V/V
pF
pF
Notes
1. Highest clock frequency at which data slicer produces 1010 output in analog self-test mode.
2. VRL = 0 V, fsys = 4.2336 MHz. The maximum input current depends on the value of the external resistor connected
to IrefT:
a) For D1 to D4: Imax = 2.4/RIrefT ⇒ 2.4/220 kΩ = 10.9 µA.
b) For R1 and R2:Imax = 1.2/RIrefT ⇒ 1.2/220 kΩ = 5.45 µA.
3. Internal reference source with 32 different output voltages. Selection is achieved during a calibration period or via
the serial interface. The values given are for an unloaded VRH.
4. VRH = 2.5 V and VRL = 0 V, measuring bandwidth: 200 Hz to 20 kHz, fi(ADC) = 1 kHz.
5. fripple = 1 kHz, Vripple = 0.5 V (p-p).
6. Gain of the ADC is defined as GADC = fsys/Imax (counts/µA); thus digital output = Ii × GADC where:
a) Digital output = the number of pulses at the digital output in counts/s and Ii = the DC input current in µA.
b) The maximum input current depends on the system frequency (fsys = 4.2336 MHz) and on VRH − VRL.
c) The gain tolerance is the deviation from the calculated gain regarding note 2.
7. It is recommended that the series resistance of the crystal or ceramic resonator is ≤60 Ω.
1998 Jul 06
47