UJA1069 Datasheet, PDF (45/64 Pages) NXP Semiconductors – LIN fail-safe system basis chip

NXP Semiconductors
UJA1069
LIN fail-safe system basis chip
Table 25. Static characteristics …continued
T_vj = −40 °C to +150 °C, V_BAT42 = 5.5 V to 52 V; V_BAT14 = 5.5 V to 27 V; V_BAT42 ≥ V_BAT14 − 1 V; unless otherwise specified. All
voltages are defined with respect to ground. Positive currents flow into the IC.^[1]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
R_pu(SCS)
pull-up resistor at
pin SCS
V_SCS = 1 V; V_V1 ≥ 2 V
50
130
400
kΩ
I_SDI
input leakage current V_SDI = 0 V to V_V1
at pin SDI
−5
-
+5
µA
Serial peripheral interface data output; pin SDO
I_OH
HIGH-level output V_SCS = 0 V; V_O = V_V1 − 0.4 V
−50
-
−1.6
mA
current
I_OL
LOW-level output V_SCS = 0 V; V_O = 0.4 V
1.6
-
20
mA
current
I_OL(off)
OFF-state output
V_SCS = V_V1; V_O = 0 V to V_V1
−5
-
leakage current
+5
µA
Reset output with clamping detection; pin RSTN
I_OH
HIGH-level output V_RSTN = 0.7 × V_V1(nom)
−1000
-
−50
µA
current
I_OL
LOW-level output
V_RSTN = 0.9 V
current
1
-
5
mA
V_OL
LOW-level output V_V1 = 1.5 V to 5.5 V;
0
-
0.2 × V_V1 V
voltage
pull-up resistor to V1 ≥ 4 kΩ
V_IH(th)
HIGH-level input
threshold voltage
0.7 × V_V1 -
V_V1 + 0.3 V
V_IL(th)
LOW-level input
threshold voltage
−0.3
-
+0.3 × V_V1 V
Enable output; pin EN
I_OH
HIGH-level output V_OH = V_V1 − 0.4 V
−20
-
−1.6
mA
current
I_OL
LOW-level output V_OL = 0.4 V
current
1.6
-
20
mA
V_OL
LOW-level output I_OL = 20 µA; V_V1 = 1.2 V
0
-
0.4
V
voltage
Interrupt output; pin INTN
I_OL
LOW-level output V_OL = 0.4 V
current
1.6
-
15
mA
LIN transmit data input; pin TXDL
V_IL
LOW level input
voltage
−0.3
-
+0.3 × V_V1 V
V_IH
HIGH-level input
voltage
0.7 × V_V1 -
V_V1 + 0.3 V
R_TXDL(pu)
TXDL pull-up
resistor
V_TXDL = 0 V
5
12
25
kΩ
LIN receive data output; pin RXDL
I_OH
HIGH-level output V_RXDL = V_V1 − 0.4 V
−50
-
−1.6
mA
current
I_OL
LOW-level output
V_RXDL = 0.4 V
current
1.6
-
20
mA
UJA1069_2
Preliminary data sheet
Rev. 02 — 5 March 2007
© NXP B.V. 2007. All rights reserved.
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