SAA567X Datasheet, PDF (43/116 Pages) NXP Semiconductors – Enhanced TV microcontrollers with On-Screen Display (OSD)

Philips Semiconductors
Enhanced TV microcontrollers with
On-Screen Display (OSD)
Objective specification
SAA567x; SAA569x
13 TIMERS/COUNTERS
Three 16-bit Timers/counters are incorporated: Timer 0, 1
and 2. Each can be configured to operate as either timers
or event counters. Timer 2 is new for the SAA56xx,
whereas Timer 0 and 1 are standard 80C51
Timer/counters, refer to “Handbook IC20 80C51-Based
8-bit Microcontrollers”. Remark: It should be noted that
because the SAA56xx uses both clock edges, the division
factor is 6 instead of 12.
When the Timers/counters are configured as timers, the
period depends on the microcontroller clock frequency of
12 MHz.
In Timer mode, the register is incremented on every
machine cycle, so that machine cycles are counted. Since
the machine cycle consists of six oscillator periods, the
count rate is ¹â„₆f_clk (where f_clk is the microcontroller clock
frequency: 12 MHz).
In Counter mode, the register is incremented in response
to a negative transition at its corresponding external pin
T0/T1/T2. Since pins T0/T1/T2 are sampled once per
machine cycle, it takes two machine cycles to recognise a
transition. This gives a maximum count rate of ¹â„₁₂f_clk
(where f_clk is the microcontroller clock frequency, 12 MHz).
13.1 Timer/counter 0 and 1
There are six Special Function Registers used to control
Timer/counter 0 and 1.
Table 14 Timer/counter 0 and 1 registers
SFR
TCON
TMOD
TL0
TH0
TL1
TH1
ADDRESS
88H
89H
8AH
8BH
8CH
8DH
The Timer/counter function is selected by control bits C/T
in the Timer Mode SFR(TMOD). These two
Timers/counters have four operating modes, which are
selected by bit-pairs (M1 and M0) in TMOD. Details of the
modes of operation is given in “Handbook IC20,
80C51-Based 8-Bit Microcontrollers”.
TL0 and TH0 are the actual Timer/counter registers for
Timer 0. TL0 is the low byte and TH0 is the high byte. TL1
and TH1 are the actual Timer/counter registers for
Timer 1. TL1 is the low byte and TH1 is the high byte.
13.2 Timer/counter 2
Timer 2 is controlled using the following SFRs:
Table 15 Timer 2 Special Function Registers
SFR
T2CON
T2MOD
RCAP2L
RCAP2H
TL2
TH2
ADDRESS
F1H
F2H
F3H
F4H
F5H
F6H
Timer 2 can operate in four different modes
(see Table 16):
• Auto-reload
• Capture
• Baud rate generation
• Clock output.
The count-down option is only possible in the Auto-reload
mode with DCEN in T2MOD set and the external trigger
input disabled.
Table 16 Timer 2 operating mode
RCLK0 OR
TCLK0 OR
RCLK1 OR
CP/RL2
T2OE
C/T2
TCLK1
OPERATING
MODE
0
0
0 X 16-bit Auto-reload
0
1
0 X 16-bit Capture
1
X
X X Baud rate
generation
X
0
1
0 Clock output
13.2.1 CAPTURE MODE
In the Capture mode, registers RCAP2L/RCAP2H are
used to capture the TL2/TH2 data. By setting/clearing bit
EXEN2 in T2CON, the external trigger input T2EX (P3.4)
can be enabled/disabled. If EXEN2 = 0, Timer 2 is a 16-bit
Timer/counter which, upon overflow, sets TF2 flag in
T2CON. If EXEN2 = 1, then Timer 2 does the above, but
with the added feature that a HIGH-to-LOW transition at
T2EX on Port 3.4 causes the current Timer 2 value
(TL2/TH2 data) to be captured into RCAP2L/RAP2H, and
bit EXF2 in T2CON to be set.
2002 May 06
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