UM10781 Datasheet, PDF(4/22 Page) NXP Semiconductors – GreenChip TEA1892DB1226 synchronous rectifier controller add-on board

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UM10781 Datasheet, PDF (4/22 Pages) NXP Semiconductors – GreenChip TEA1892DB1226 synchronous rectifier controller add-on board

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NXP Semiconductors

UM10781

TEA1892DB1226 synchronous rectifier controller add-on board

3. TEA1892TS SR controller

The TEA1892TS is a member of the new generation of Synchronous Rectifier (SR)

controller ICs for switched mode power supplies. Its high level of integration allows the

design of a cost-effective power supply with a very low number of external components.

The IC provides synchronous rectification on the secondary side for discontinuous

conduction mode and quasi-resonant mode flyback converters.

It is a successor to the TEA1792TS synchronous rectifier controller IC. The TEA1892TS

provides improved performance at lower loads by disabling cycle shipping.

An efficient control algorithm built into the IC determines when a MOSFET is switched on

or off. After a negative voltage lower than Vact(drv) (ï220 mV typical) is sensed on the

SRSENSE pin, the driver output voltage is driven HIGH. Then the external MOSFET is

switched on. When VSRSENSE rises to Vreg(drv) (ï42 mV/ï30 mV), the driver output voltage

is regulated to maintain the Vreg(drv) on the SRSENSE pin. When the SRSENSE voltage is

above the Vdeact(drv) level (ï12 mV typical), the driver output is pulled to ground.

After switch-on of the SR MOSFET, the input signal on the SRSENSE pin is blanked

during the tact(sr)(min) (1.5 ïs typical). This action eliminates false switch-off due to high

frequency ringing at the start of the secondary stroke.

When the secondary current is reduced until the SRSENSE voltage is Vref, the internal

control loop maintains the Vreg(drv) level across the MOSFET. Maintaining Vreg(drv) in this

instance is achieved when the VDRIVER voltage is decreased. This reduction enables the

external power switch to be switched off quickly when the current through the switch

reaches zero. The zero current is detected by sensing a Vdeact(drv) (ï12 mV typical) level

on the SRSENSE pin.

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Fig 2. Pin configuration TEA1892TS (TSOP6)

UM10781

User manual

All information provided in this document is subject to legal disclaimers.

Rev. 1 â 20 May 2014

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