TDA3866 Datasheet, PDF (4/16 Pages) NXP Semiconductors – Quasi-split sound processor for all standards

Philips Semiconductors
Quasi-split sound processor for all standards
Preliminary specification
TDA3866
PINNING
SYMBOL
AMIF1
AMIF2
C_AGC
C_AM
MODE
FM2R1
FM2R2
AF2
AF1
FM1R1
FM1R2
VC-R1
VC-R2
C_AFAM
FM1I
C_AF1
ICO
C_AF2
FM2I
GND
V_P
C_ref
FMIF1
FMIF2
PIN
DESCRIPTION
1 AM IF difference input 1 for L standard (32.4 MHz)
2 AM IF difference input 2 for L standard
3 charge capacitor for AGC (FM and AM)
4 charge capacitor for AM AGC
5 3-state input for standard select
6 reference circuit for FM2 (5.74 MHz)
7 reference circuit for FM2 (5,74 MHz)
8 AF2 output (AF out of 5.74 MHz)
9 AF1 output (AF out of 5.5 MHz or AM)
10 reference circuit for FM1 (5.5 MHz)
11 reference circuit for FM1 (5.5 MHz)
12 reference circuit for the vision carrier (38.9 MHz)
13 reference circuit for the vision carrier (38.9 MHz)
14 DC-decoupling capacitor for AM demodulator (AF-AM)
15 intercarrier input for FM1 (5.5 MHz)
16 DC-decoupling capacitor for FM1 demodulator (AF1)
17 intercarrier output signal (5.5/5.74 MHz)
18 DC-decoupling capacitor for FM2 demodulator (AF2)
19 intercarrier input for FM2 (5.74 MHz)
20 ground (0 V)
21 +5 ... +8 V supply voltage
22 charge capacitor for reference voltage
23 IF difference input 1 for B/G standard (38.9 MHz)
24 IF difference input 2 for B/G standard (38.9 MHz)
PIN CONFIGURATION
Fig.2 Pin configuration.
January 1992
4