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SAA5191 Datasheet, PDF (4/9 Pages) NXP Semiconductors – Teletext video processor
Philips Semiconductors
Teletext video processor
Preliminary specification
SAA5191
PINNING
SYMBOL
STTV
VILS
Cfilt
Cstore
Campl
Czero
EXD
Ctime
CCLK
CBB
XTAL
CLF
GND
TTC
TTD
VP
F13
OSCO
CVCR
OSCI
Chor
PL
RT
CT
VCS
CBL
CVBS
TCS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
DESCRIPTION
sync output signal to TV (positive or negative going)
level select input of video input (LOW equals 1 V)
video filtering capacitor of HF loss compensation
HF storage capacitor
amplitude capacitor
zero level capacitor
external data current input (note 1)
data timing capacitor for the adaptive data slicer
clock phase detector capacitor
blanking insertion input
13.875 MHz crystal (double of data rate)
6.9375 MHz clock frequency filter
ground (0 V)
teletext clock output (for computer controlled teletext)
teletext data output (for computer controlled teletext)
+12 V supply voltage
13.5 MHz VCO output (for sandcastle generation)
oscillator output to series LC-circuit or crystal
short time constant capacitor at video recorder mode
(note 2)
oscillator input from series LC-circuit or crystal
horizontal phase capacitor / VCR mode
sandcastle input (generated in CCT)
timing resistor for pulse generator
timing capacitor for pulse generator
video composite sync output to CCT
black level capacitor
composite video input signal from TV
text-composite/scan-composite sync input (TSC/SCS)
Notes
1. Sliced teletext data from external: active HIGH level (current), low
impedance input.
2. While the loop is locking up.
PIN CONFIGURATION
fpage
STTV 1
28 TCS
VILS 2
27 CVBS
Cfilt 3
26 CBL
Cstore 4
25 VCS
Campl 5
24 CT
Czero 6
23 RT
EXD 7
Ctime 8
22 PL
SAA5191
21 Chor
CCLK 9
20 OSCI
CCB 10
19 CVCR
XTAL 11
18 OSCO
CLF 12
17 F13
GND 13
TTC 14
16 VP
15 TTD
MEH150
Fig.2 Pin configuration.
March 1991
4