PHP65N06LT Datasheet, PDF (4/9 Pages) NXP Semiconductors – TrenchMOS transistor Logic level FET

Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP65N06LT, PHB65N06LT
1000
ID / A
RDS(ON) = VDS/ID
100
DC
10
SOAX518
tp =
1 us
10 us
100 us
1 ms
10 ms
100 ms
11
10
100
VDS / V
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth j-mb / (K/W)
10
BUKx55-lv
D=
1
0.5
0.2
0.1 ^0.1
0.05
0.02
0.01
0
P_D
tp
D
=
tp
T
0.001
1E-07
1E-05
1E-03
t/s
T
t
1E-01
1E+01
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
Drain current, ID (A)
100
10 5
VGS = 4.0 V
80
3.8
3.6
60
3.4
40
3.2
3.0
20
2.8
2.6
2.4
0
0
2
4
6
8
10
Drain-source voltage, VDS (V)
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
25 ^RDS(ON)/mOhm
VGS/V =
3.6
20
15
4
4.2
4.4
4.6
5
10
10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100
ID/A
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
100
ID/A
80
60
40
20
Tj/C = 175 25
0
0
1
2
3
4
5
6
VGS/V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Transconductance, gfs (S)
60
50
40
30
20
10
0
0
20
40
60
80
100
Drain current, ID (A)
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
January 1998
4
Rev 1.300