PHP44N06LT Datasheet, PDF (4/10 Pages) NXP Semiconductors – TrenchMOS transistor Logic level FET

Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHP44N06LT, PHB44N06LT, PHD44N06LT
1000
ID/A
RDS(ON) = VDS/ID
100
tp =
1 us
10us
DC
10
100 us
1 ms
10ms
100ms
1
1
10
VDS/V
100
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth/ (K/W)
10
1 _0.5
0.2
0.1
0.1 _0.05
0.02
P_D
tp
D
=
tp
T
T
t
0
0.01
1.0E-06
0.0001
0.01
1
100
t/s
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
Drain current, ID (A)
100 ₁₀
5
4.8
8
80
6
VGS = 4.6 V
4.4
4.2
4.0
3.8
60
3.6
3.4
40
3.2
3.0
20
2.8
2.2
2.6
2.4
0
0
2
4
6
8
10
Drain-source voltage, VDS (V)
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON)/mOhm
34
32
VGS/V =
30
28
26
4
4.2
4.4 4.6
4.8
5
24
22
20
0
Fig.6.
10
20
30 _ID/A 40
50
60
70
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
80
ID/A
70
60
50
40
30
20
10
Tj/C = 175
25
0
0
1
2
3 _VGS/V 4
5
6
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Transconductance, gfs (S)
40
35
30
25
20
15
10
5
0
10 20 30 40 50 60 70 80
Drain current, ID (A)
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
September 1998
4
Rev 1.400