BUK582-100A Datasheet, PDF (4/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
ID/ A
7
BUK582-100A
6
5
4
3
2
Tj/ C = 150
25
1
0
0
1
2
3
4
VGS/ V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
gfs / S
6
BUK582-100A
5
4
3
2
1
0
0
1
2
3
4
5
6
7
ID/ A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
2.0 ^a
Normalised RDS(ON) = f(Tj)
1.5
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 1.7 A; V_GS = 5 V
Product Specification
BUK582-100A
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
ID / A
1E-01
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2%
typ
98 %
1E-04
1E-05
1E-06
0
0.4
0.8
1.2
1.6
2
2.4
VGS / V
Fig.11. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
C / pF
10000
BUK5y2-100
1000
Ciss
100
Coss
Crss
10
0
20
40
VDS / V
Fig.12. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
January 1998
4
Rev 1.100