BUK542-60A Datasheet, PDF (4/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
ID / A
28
10
7
24
BUK552-60A
6
20
5
16
12
VGS / V =
4
8
3
4
0
0
2
4
6
8
10
VDS / V
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON) / Ohm
0.5
3 3.5 4
0.4
0.3
4.5 5
BUK552-60A
VGS / V =
5.5
6
7
0.2
10
0.1
0
0
Fig.6.
10
20
30
40
ID / A
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
ID / A
28
BUK552-60A
24
Tj / C =
25
20
150
16
12
8
4
0
0
2
4
6
8
VGS / V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Product specification
BUK542-60A/B
gfs / S
7
BUK 552-60A
6
5
4
3
2
1
0
0
4
8
12 16 20 24 28
ID / A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
a
1.5
Normalised RDS(ON) = f(Tj)
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 8.5 A; V_GS = 5 V
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
August 1994
4
Rev 1.100