BUK542-100A Datasheet, PDF (4/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
ID / A
20
VGS / V =
15
10
BUK552-100A
10
7
5
4
5
3
0
0
2
4
6
8
10
VDS / V
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON) / Ohm
1.0
3
3.5
0.8
0.6
0.4
0.2
BUK552-100A
4
VGS / V =
4.5
5
7
10
0
0
Fig.6.
2 4 6 8 10 12 14 16 18 20
ID / A
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
ID / A
20
15
Tj / C =
BUK552-100A
25
150
10
5
0
0
2
4
6
8
VGS / V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Product Specification
BUK542-100A/B
gfs / S
6
BUK 552-100A
5
4
3
2
1
0
0 2 4 6 8 10 12 14 16 18 20
ID / A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
2.0 ^a
Normalised RDS(ON) = f(Tj)
1.5
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 5.5 A; V_GS = 5 V
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
April 1993
4
Rev 1.100