AU2901 Datasheet, PDF (4/10 Pages) NXP Semiconductors – Quad voltage comparator

Philips Semiconductors
Quad voltage comparator
Product data
AU2901
ELECTRICAL CHARACTERISTICS
V+ = 5 V_DC; –40 °C ≤ T_amb ≤ 125 °C, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
Limits
Min
Typ
Max
UNIT
V_OS
Input offset voltage²
T_amb = 25 °C
Over temp.
±2.0
±3
mV
±2.5
±5
V_CM
Input common-mode voltage range³
T_amb = 25 °C
Over temp.
0
V+ –1.5
V
0
V+ –2.0
V_IDR
I_BIAS
Differential input voltage¹
Input bias current⁴
Keep all V_INs ≥ 0V_DC (or V– if need)
I_IN(+) or I_IN(–) with output in linear range
T_amb = 25 °C
Over temp.
V+
V
25
250
nA
200
500
I_OS
Input offset current
I_IN(+) – I_IN(–)
T_amb = 25 °C
Over temp.
±5
±50
nA
±50
±200
nA
I_OL
Output sink current
I_OH
Output leakage current
I_CC
Supply current
V_IN(–) ≥ 1 V_DC; V_IN(+) = 0; V_O ≤ 1.5 V_DC;
T_amb = 25 °C
6.0
16
mA
V_IN(+) ≥ 1 V_DC; V_IN(–) = 0
V_O = 5 V_DC; T_amb = 25 °C
V_O = 30 V_DC; Over temp.
0.1
nA
1.0
µA
R_L = ∞ on comparators,
T_amb = 25 °C
V+ = 30 V
0.8
2.0
mA
1.0
2.5
A_V
Voltage gain
V_OL
Saturation voltage
R_L ≥ 15 kΩ; V+ = 15 V_DC
V_IN(–) ≥ 1 V_DC; V_IN(+) = 0; I_SINK ≤ 4 mA
T_amb = 25 °C
Over temp.
25
100
400
V/mV
400
mV
700
t_LSR
Large–signal response time
V_IN = TTL logic swing; V_REF = 1.4V_DC;
V_RL = 5V_DC; R_L = 5.1 kΩ; T_amb = 25 °C
300
ns
t_R
Response time⁵
V_RL = 5 V_DC; R_L = 5.1 kΩ; T_amb = 25 °C
1.3
µs
NOTES:
1. Positive excursions of input voltage may exceed the power supply level by 17 V. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3 V_DC (or
0.3 V_DC below the magnitude of the negative power supply, if used).
2. At output switch point, V_O ≈ 1.4 V_DC, R_S = 0 Ω with V+ from 5 V_DC to 30 V_DC; and over the full input common-mode range (0 V_DC to
V+ – 1.5 V_DC).
3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common-mode voltage range is V+ – 1.5 V, but either or both inputs can go to 30 V_DC without damage.
4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the reference or input lines.
5. The response time specified is for a 100 mV input step with a 5 mV overdrive. For larger overdrive signals, 300 ns can be obtained (see
Typical Performance Characteristics section).
2001 Aug 03
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