74F534 Datasheet, PDF (4/12 Pages) NXP Semiconductors – Latch/flip-flop

Philips Semiconductors
Latch/flip-flop
Product specification
74F533,* 74F534
LOGIC DIAGRAM – 74F533
D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18
D
EQ
D
EQ
D
EQ
D
EQ
D
EQ
D
EQ
D
EQ
D
EQ
E ¹¹
1
OE
V_CC=Pin 20
GND=Pin 10
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SF00987
LOGIC DIAGRAM – 74F534
D0
D1
D2
D3
D4
D5
D6
D7
3
4
7
8
13
14
17
18
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
CP ¹¹
1
OE
V_CC=Pin 20
GND=Pin 10
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SF00988
FUNCTION TABLE – 74F533
INPUTS
OE
E
Dn
INTERNAL
REGISTER
OUTPUTS
Q0 – Q7
L
H
L
L
H
L
H
H
H
L
L
↓
l
L
H
L
↓
h
H
L
L
L
X
NC
NC
H
L
X
NC
Z
H
H
Dn
Dn
Z
H = High voltage level
h = High voltage level one setup time prior to the High-to-Low E transition
L = Low voltage level
l = Low voltage level one setup time prior to the High-to-Low E transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↓ = High-to-Low E transition
* Discontinued part. Please see the Discontinued Products List.
1999 Jan 08
4
OPERATING MODES
Load and read register
Enable and read register
Hold
Disable outputs