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74AUP1G02GS Datasheet, PDF (4/21 Pages) NXP Semiconductors – Low-power 2-input NOR gate
NXP Semiconductors
74AUP1G02
Low-power 2-input NOR gate
7. Functional description
Table 4. Function table[1]
Input
A
B
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Output
Y
H
L
L
L
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
−0.5
+4.6
V
IIK
input clamping current
VI < 0 V
−50
-
mA
VI
input voltage
[1] −0.5
+4.6
V
IOK
output clamping current VO > VCC or VO < 0 V
-
±50
mA
VO
output voltage
Active mode and Power-down mode [1] −0.5
+4.6
V
IO
output current
VO = 0 V to VCC
-
±20
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = −40 °C to +125 °C
-
−50
−65
[2] -
+50
mA
-
mA
+150
°C
250
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
VCC
VI
VO
Tamb
Δt/ΔV
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
output voltage
Active mode
ambient temperature
Power-down mode; VCC = 0 V
input transition rise and fall rate VCC = 0.8 V to 3.6 V
Min Max Unit
0.8
3.6
V
0
3.6
V
0
VCC
V
0
3.6
V
−40 +125 °C
0
200 ns/V
74AUP1G02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 27 June 2012
© NXP B.V. 2012. All rights reserved.
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