74ABT10 Datasheet, PDF (4/9 Pages) NXP Semiconductors – Triple 3-input NAND gate

Philips Semiconductors
Triple 3-input NAND gate
Product specification
74ABT10
AC CHARACTERISTICS
GND = 0V; t_R = t_F = 2.5ns; C_L = 50pF, R_L = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T_amb = +25°C
V_CC = +5.0V
MIN
TYP
MAX
T_amb = –40°C to +85°C
V_CC = +5.0V ±0.5V
MIN
MAX
UNIT
t_PLH
Propagation delay
t_PHL
An, Bn, Cn to Yn
1
1.0
3.3
4.7
1.0
1.0
2.2
3.3
1.0
5.3
3.7
ns
t_OSHL
t_OSLH1
Output to Output skew
An or Bn to Yn
2
0.4
0.5
0.5
ns
NOTE:
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same
device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (t_OSHL) or LOW-to-HIGH (t_OSLH);
parameter guaranteed by design.
AC WAVEFORMS
V_M = 1.5V, V_IN = GND to 3.0V
An, Bn, Cn
V_M
V_M
t_PHL
t_PLH
Yn
V_M
V_M
SA00357
Waveform 1. Propagation Delay for Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
V_CC
V_IN
PULSE
GENERATOR
D.U.T.
V_OUT
R_L
R_T
C_L
Test Circuit for Outputs
DEFINITIONS
R_L = Load resistor; see AC CHARACTERISTICS for value.
C_L = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R_T = Termination resistance should be equal to Z_OUT of
pulse generators.
1995 Sep 22
INPUT
OUTPUT
OUTPUT N
same part
t_PLH
MIN
t_PHL
MIN
t_{PLH MAX}
t_PHLMAX
t_OSLH
t_OSHL
SA00381
Waveform 2. Common edge skew
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
V_M
10%
t_W
V_M
10%
t_THL (t_F)
t_TLH (t_R)
90%
V_M
90%
V_M
t_W
V_M = 1.5V
Input Pulse Definition
90%
AMP (V)
0V
t_TLH (t_R)
t_THL (t_F)
AMP (V)
10%
0V
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t_W
t_R
t_F
74ABT
3.0V
1MHz 500ns 2.5ns 2.5ns
SH00067
4