SAA56XX Datasheet, PDF (37/112 Pages) NXP Semiconductors – Enhanced TV microcontrollers with On-Screen Display (OSD)

Philips Semiconductors
Enhanced TV microcontrollers with
On-Screen Display (OSD)
Product specification
SAA56xx
handbook, full pagewidth
MOVX @ Ri,A
MOVX A, @ Ri
FFH
FFFFH
00H
XRAMP SFR = FFH
FF00H
Not Allocated
FFH
4FFFH
00H
XRAMP SFR = FFH
4000H
FFH
20FFH
00H
XRAMP SFR = FFH
2000H
Allocated⁽¹⁾
FFH
08FFH
00H
XRAMP SFR = FEH
0800H
Not Allocated
FFH
01FFH ^{MOVX @ DPTR,A}
MOVX A, @ DPTR
00H
XRAMP SFR = 01H
0100H
FFH
00FFH
Allocated⁽¹⁾
00H
XRAMP SFR = 00H
0000H
GSA070
(1) Internal 14-kbyte data and display RAM of the device.
Fig.9 Indirect addressing of MOVX RAM.
9 POWER-ON RESET
Two reset inputs are present on the device, the RESET pin
being active HIGH and RESET pin being active LOW. Only
one of these inputs need be connected in the system as
they are ORed internally to the device and each pin has
the necessary pull-down (for RESET) and pull-up (for
RESET) resistors at the pad.
An automatic reset can be obtained when V_DD is switched
on by connecting the RESET pin to V_DDP through a 10 µF
capacitor, providing the V_DD rise time does not exceed
1 ms, and the oscillator start-up time does not exceed
10 ms.
Alternatively, a capacitor connected to V_SSP with a suitable
pull-up to V_DDP, (e.g. 10 µF capacitor; 16 kΩ resistor) can
be connected to the RESET pin.
To ensure correct initialisation, the RESET/RESET pin
must be held HIGH/LOW long enough for the oscillator to
settle following power-up, usually a few milliseconds
(application specific, typically 10 ms). Once the oscillator
is stable, a further 24 crystal clocks are required to
generate the reset. Once the above reset condition has
been detected, an internal reset signal is triggered (which
remains active for 2048 clock cycles).
2001 Dec 13
37