TFA9812 Datasheet, PDF (36/66 Pages) NXP Semiconductors – BTL stereo Class-D audio amplifier with I2S input

NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I²S input
9.5.7 Digital-in clock configuration
Table 43.
Bit
Symbol
Default
Bit
Symbol
Default
Register 2Dh: digital-in clock configuration
15
14
13
12
RSD
RSD
RSD
RSD
0
0
0
0
7
6
5
4
RSD
RSD
RSD
FSUB3
0
0
0
0
11
RSD
0
3
FSUB2
1
10
RSD
0
2
FSUB1
1
9
RSD
0
1
FSUB0
1
8
RSD
0
0
DI_MS
0
Table 44.
Bit
4 to 1
0
Bit description of register 2Dh:digital-in clock configuration
Symbol
Description
FSUB[3:0]
Sample frequency f_s of digital-in signal:
0 = 8 kHz
1 = 11.025 kHz
2 = 12 kHz
3 = 16 kHz
4 = 22.05 kHz
5 = 24 kHz
6 = 32 kHz
7 = 44.1 kHz
8 = 48 kHz
9 = 64 kHz
10 = 88.2 kHz
11 = 96 kHz
12 = 128 kHz
13 = 176.4 kHz
14 = 192 kHz
15 = RSD
DI_MS
TFA9812 digital-in Master/Slave mode selection:
0 = Slave mode
1 = Master mode
9.5.8 Thermal foldback control
Table 45.
Bit
Symbol
Default
Bit
Symbol
Default
Register 2Eh: thermal foldback control
15
14
13
RSD
RSD
RSD
0
0
0
7
6
5
TP_THR7 TP_THR6 TP_THR5
0
0
0
12
RSD
0
4
TP_THR4
0
11
RSD
0
3
TP_THR3
0
10
RSD
0
2
TP_THR2
0
9
TP_THR9
0
1
TP_THR1
0
8
TP_THR8
0
0
TP_THR0
0
TFA9812_2
Preliminary data sheet
Rev. 02 — 22 January 2009
© NXP B.V. 2009. All rights reserved.
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