ADC1610S_11 Datasheet, PDF (34/40 Pages) NXP Semiconductors – Single 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

NXP Semiconductors
ADC1610S series
Single 16-bit ADC; CMOS or LVDS DDR digital output
Table 27. Test pattern register 2 (address 0015h) bit description
Default values are highlighted.
Bit
Symbol
Access Value
Description
7 to 0 TESTPAT_USER[15:8]
R/W
00000000 custom digital test pattern (bits 13 to 6)
Table 28. Test pattern register 3 (address 0016h) bit description
Default values are highlighted.
Bit
Symbol
Access Value
Description
7 to 0 TESTPAT_USER[7:0]
R/W
00000000 custom digital test pattern (bits 7 to 0)
Table 29. Fast OTR register (address 0017h) bit description
Default values are highlighted.
Bit
Symbol
Access Value Description
7 to 4 -
0000
not used
3
FASTOTR
R/W
fast OuT-of-Range (OTR) detection
0
disabled
1
enabled
2 to 0 FASTOTR_DET[2:0]
R/W
set fast OTR detect level
000
−20.56 dB
001
−16.12 dB
010
−11.02 dB
011
−7.82 dB
100
−5.49 dB
101
−3.66 dB
110
−2.14 dB
111
−0.86 dB
Table 30. CMOS output register (address 0020h) bit description
Default values are highlighted.
Bit
Symbol
Access
Value Description
7 to 4 -
0000
not used
3 to 2 DAV_DRV[1:0]
R/W
drive strength for DAV CMOS output buffer
00
low
01
medium
10
high
11
very high
1 to 0 DATA_DRV[1:0]
R/W
drive strength for DATA CMOS output buffer
00
low
01
medium
10
high
11
very high
ADC1610S_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 January 2011
© NXP B.V. 2011. All rights reserved.
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