SAA2500 Datasheet, PDF (31/47 Pages) NXP Semiconductors – MPEG Audio Source Decoder

Philips Semiconductors
MPEG Audio Source Decoder
Preliminary specification
SAA2500
APPENDIX
Preliminary specification 3-line ‘L3’ interface
INTRODUCTION
The main purpose of the new interface definition is to
define a protocol that allows for the transfer of control
information and operational details between a
microcontroller (µC) and a number of slave devices, at a
rate that exceeds other common interfaces, but with a
sufficient low complexity for application in consumer
products. It should be clearly noted that the current
interface definition is intended for use in a single
apparatus, preferably restricted to a single printed circuit
board.
The new interface requires 3 signal lines (apart from a
return ‘ground’) between the microcontroller and the slave
devices (from this the name ‘L3’ is derived). These 3-lines
are common to all ICs connected to the bus: L3MODE,
L3DATA and L3CLK. L3MODE and L3CLK are always
driven by the microcontroller, L3DATA is bidirectional:
Table 31 The 3-lines common to all ICs; L3MODE,
L3CLK and L3DATA.
SIGNAL
L3MODE⁽¹⁾
L3CLK⁽²⁾
L3DATA⁽³⁾
MICROCONTROLLER
output
output
output/input
SLAVE
DEVICE
input
input
input/output
Notes
1. L3MODE is used for the identification of the operation
mode.
2. L3CLK is the bitclock to which the information transfer
will be synchronized.
3. L3DATA will carry the information to be transferred.
All slave devices in the system can be addressed using a
6 bit address. This allows for up to 63 different slave
devices, as the all ‘0’ address is reserved for special
purposes. In addition it is possible to extend the number of
addressable devices using ‘extended addressing’.
In operation 2 modes can be identified:
1. Addressing mode (AM).
During addressing mode a single byte is sent by the
microcontroller. This byte consists of 2 data operation
mode (DOM) bits and 6 operational address (OA) bits.
Each of the slave devices evaluates the operational
address. Only the device that has been issued the
same operational address will become active during
the following data mode. The operation to be executed
during the data mode is indicated by the two data
operation mode bits.
2. Data mode (DM).
During data mode information is transferred between
microcontroller and slave device. The transfer
direction may be from microcontroller to slave (‘write’)
or from slave to microcontroller (‘read’). However,
during one data mode the transfer direction can not
change.
Addressing mode
In order to start an addressing mode the microcontroller
will make the L3MODE line LOW. The L3CLK line is
lowered 8 times and the DATA line will carry 8 bits. The
addressing mode is ended by making the L3MODE line
HIGH.
September 1994
31