ADC1413D065 Datasheet, PDF (30/38 Pages) NXP Semiconductors – Dual 14 bits ADC; 65, 80, 105 or 125 Msps; serial JESD204A interface

NXP Semiconductors
ADC1413D065/080/105/125
Dual 14 bits ADC; 65, 80, 105 or 125 Msps
Table 34. SER PRBS Ctrl (address 080Bh)
Bit Symbol
Access Value
Description
7 to 2 -
R
000000 Not used
1 to 0 PRBS_TYPE
R/W
Defines the type of Pseudo-Random Binary Sequence (PRBS)
generator to be used:
00 (reset) PRBS-7
01
PRBS-7
10
PRBS-23
11
PRBS-31
Table 35. Cfg_0_DID (address 0820h)
Bit Symbol
Access
7 to 0 DID
R
Value
Description
11101101 Defines the device (= link) identification number
Table 36. Cfg_1_BID (address 0821h)
Bit Symbol
Access
7 to 4 -
R
3 to 0 BID
R/W
Value
0000
1010
Description
Not used
Defines the bank ID – extension to DID
Table 37. Cfg_3_SCR_L (address 0822h)
Bit Symbol
Access Value
7
SCR
R/W
0
6 to 1 -
R
000000
0
L
R/W
0
Description
Scrambling enabled
Not used
Defines the number of lanes per converter device, minus 1
Table 38. Cfg_4_F (address 0823h)
Bit Symbol
Access
7 to 3 -
R
2 to 0 F
R/W
Value
00000
000
Description
Not used
Defines the number of octets per frame, minus 1
Table 39. Cfg_5_K (address 0824h)
Bit Symbol
Access
7 to 5 -
R
4 to 0 K
R/W
Value
000
00000
Description
Not used
Defines the number of frames per multiframe, minus 1
Table 40. Cfg_6_M (address 0825h)
Bit Symbol
Access
7 to 1 -
R
0
M
R/W
Value
0000000
0
Description
Not used
Defines the number of converters per device, minus 1
ADC1413D065_080_105_125_2
Objective data sheet
Rev. 02 — 4 June 2009
© NXP B.V. 2009. All rights reserved.
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