TDA8579 Datasheet, PDF (3/13 Pages) NXP Semiconductors – Dual common-mode rejection differential line receiver

Philips Semiconductors
Dual common-mode rejection
differential line receiver
BLOCK DIAGRAM
1
INL
VCC
8
7
VCC
OUTL
IN
2 _TDA8579
4 _SVRR
INR
3
6
OUTR
5
GND
MBD230
Fig.1 Block diagram.
PINNING
SYMBOL
INL+
IN−
INR+
SVRR
GND
OUTR
OUTL
V_CC
PIN
DESCRIPTION
1 positive input left
2 common negative input
3 positive input right
4 half supply voltage
5 ground
6 output right
7 output left
8 supply voltage
Product specification
TDA8579
FUNCTIONAL DESCRIPTION
The TDA8579 contains two identical differential amplifiers
with a voltage gain of 0 dB. The device is intended to
receive line input signals for audio applications. The
TDA8579 has a very high level of common-mode rejection
and thus eliminates ground noise. The common-mode
rejection remains constant up to high frequencies (the
amplifier gain is fixed at 0 dB). The inputs have a high input
impedance. The output stage is a class AB stage with a
low output impedance. For a large common-mode
rejection, also at low frequencies, an electrolytic capacitor
connected to the negative input is advised. Because the
input impedance is relatively high, this results in a large
settling time of the DC input voltage. Therefore a
quick-charge circuit is included to charge the input
capacitor within 0.2 seconds.
All input and output pins are protected against high
electrostatic discharge conditions (4000 V, 150 pF, 150 Ω).
INL 1
IN 2
INR 3
SVRR 4
TDA8579
8 ^V _CC
7 OUTL
6 OUTR
5 GND
MBD231
Fig.2 Pin configuration.
1995 Dec 15
3