TDA8442 Datasheet, PDF (3/10 Pages) NXP Semiconductors – I2C-bus interface for colour decoders

Philips Semiconductors
I²C-bus interface for colour decoders
Product specification
TDA8442
PINNING
PIN
1
2
3
4
5
6
SYMBOL
DAC1
DAC2
DAC3
SDA
SCL
P2
7
n.c.
8
GND
9
V_P
10
n.c.
11
P1
12
P2N
13
n.c.
14
n.c.
15
n.c.
16
DAC0
DESCRIPTION
analogue output 1
analogue output 2
analogue output 3
serial data line; I²C-bus
serial clock line; I²C-bus
Port 2 npn collector output
with internal pull-up
resistor
not connected
supply return (ground)
positive supply voltage
not connected
Port 1 open npn emitter
output
inverted P2 output
not connected
not connected
not connected
analogue output 0
Fig.2 Pinning diagram
FUNCTIONAL DESCRIPTION
Control
Analogue control is facilitated by four 6-bit digital-to-analogue converters (DAC0 to DAC3).
The values of the output voltages from the DACs are set via the I²C-bus.
The high-current output port (P1) is suitable for switching between internal and external RGB signals.
It is an open npn emitter output capable of sourcing 14 mA (min.).
The two output ports (P2 and P2N) can be used for NTSC/PAL switching. These are npn collector outputs with internal
pull-up resistors of 10 kΩ (typ.). Both outputs are capable of sinking up to 2 mA with a voltage drop of less than 400 mV.
If one output is switched on (LOW), the other output is switched off, and vice versa.
Reset
The power-down-reset mode occurs whenever the positive supply voltage falls below 8.5 V (typ.) and resets all registers
to a defined state.
March 1991
3