PEMD13_PUMD13_15 Datasheet, PDF (3/16 Pages) NXP Semiconductors – NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k

NXP Semiconductors
PEMD13; PUMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 47 k
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Per transistor; for the PNP transistor (TR2) with negative polarity
V_CBO
collector-base voltage open emitter
-
V_CEO
collector-emitter voltage open base
-
V_EBO
emitter-base voltage
open collector
-
V_I
input voltage TR1
positive
-
negative
-
input voltage TR2
positive
-
negative
-
I_O
output current
-
I_CM
peak collector current
single pulse;
-
t_p  1 ms
P_tot
total power dissipation T_amb  25 C
PEMD13 (SOT666)
[1][2] _-
PUMD13 (SOT363)
[1] _-
Per device
P_tot
total power dissipation T_amb  25 C
PEMD13 (SOT666)
[1][2] _-
PUMD13 (SOT363)
[1] _-
T_j
junction temperature
-
T_amb
ambient temperature
65
T_stg
storage temperature
65
Max Unit
50
V
50
V
5
V
+30
V
5
V
+5
V
30
V
100
mA
100
mA
200
mW
200
mW
300
mW
300
mW
150
C
+150 C
+150 C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
PEMD13_PUMD13
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 7 December 2011
© NXP B.V. 2011. All rights reserved.
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