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| HEF4073B Datasheet, PDF (3/3 Pages) NXP Semiconductors – Triple 3-input AND gate | |||
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Philips Semiconductors
Triple 3-input AND gate
Product speciï¬cation
HEF4073B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ⤠20 ns
VDD
V
SYMBOL
TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In â On
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
5
10 tPHL
15
5
10
tPLH
15
5
10 tTHL
15
5
10
tTLH
15
55
110 ns 23 ns + (0,55 ns/pF) CL
25
50 ns 14 ns + (0,23 ns/pF) CL
20
40 ns 12 ns + (0,16 ns/pF) CL
45
90 ns 13 ns + (0,55 ns/pF) CL
20
40 ns
9 ns + (0,23 ns/pF) CL
15
30 ns
7 ns + (0,16 ns/pF) CL
60
120 ns 10 ns + (1,0 ns/pF) CL
30
60 ns
9 ns + (0,42 ns/pF) CL
20
40 ns
6 ns + (0,28 ns/pF) CL
60
120 ns 10 ns + (1,0 ns/pF) CL
30
60 ns
9 ns + (0,42 ns/pF) CL
20
40 ns
6 ns + (0,28 ns/pF) CL
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
600 fi + â (foCL) Ã VDD2
where
10
2700 fi + â (foCL) Ã VDD2
fi = input freq. (MHz)
15
8400 fi + â (foCL) Ã VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
â (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
3
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