74LVC4245A_15 Datasheet, PDF (3/18 Pages) NXP Semiconductors – 74LVC4245A_15

NXP Semiconductors
74LVC4245A
Octal dual supply translating transceiver; 3-state
5. Pinning information
5.1 Pinning
74LVC4245A
V_CC(A) 1
DIR 2
A0 3
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A7 10
GND 11
GND 12
24 V_CC(B)
23 V_CC(B)
22 OE
21 B0
20 B1
19 B2
18 B3
17 B4
16 B5
15 B6
14 B7
13 GND
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Fig 3. Pin configuration SO24 and (T)SSOP24
74LVC4245A
terminal 1
index area
DIR 2
A0 3
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A7 10
GND 11
GND⁽¹⁾
23 V_CC(B)
22 OE
21 B0
20 B1
19 B2
18 B3
17 B4
16 B5
15 B6
14 B7
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Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration DHVQFN24
5.2 Pin description
Table 2.
Symbol
V_CC(A)
V_CC(B)
GND
DIR
A[0:7]
B[0:7]
OE
Pin description
Pin
1
23, 24
11, 12, 13
2
3, 4, 5, 6, 7, 8, 9, 10
21, 20, 19, 18, 17, 16, 15, 14
22
Description
supply voltage (5 V bus)
supply voltage (3 V bus)
ground (0 V)
direction control
data input or output
data input or output
output enable input (active LOW)
74LVC4245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 18 December 2012
© NXP B.V. 2012. All rights reserved.
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