74LV02 Datasheet, PDF (3/10 Pages) NXP Semiconductors – Quad 2-input NOR gate

Philips Semiconductors
Quad 2-input NOR gate
Product specification
74LV02
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
1Y 1
1A 2
1B 3
2Y 4
2A 5
2B 6
GND 7
LOGIC SYMBOL
14 V_CC
13 4Y
12 4B
11 4A
10 3Y
9 3B
8 3A
SV00389
2 1A
3 1B
5 2A
6 2B
8 3A
9 3B
11 4A
12 4B
1Y 1
2Y 4
3Y 10
4Y 13
2
≥1
1
3
5
≥1
4
6
8
≥1
10
9
11
≥1
13
12
SV00391
LOGIC DIAGRAM (ONE GATE)
A
Y
B
SV00393
SV00390
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
V_CC
V_I
V_O
T_amb
DC supply voltage
Input voltage
Output voltage
Operating ambient temperature range in free air
See Note 1
See DC and AC
characteristics
1.0
3.3
5.5
V
0
–
V_CC
V
0
–
V_CC
V
–40
–40
+85
+125
°C
t_r, t_f
Input rise and fall times
V_CC = 1.0V to 2.0V
–
–
500
V_CC = 2.0V to 2.7V
V_CC = 2.7V to 3.6V
–
–
–
–
200
100
ns/V
V_CC = 3.6V to 5.5V
–
–
50
NOTE:
1. The LV is guaranteed to function down to V_CC = 1.0V (input levels GND or V_CC); DC characteristics are guaranteed from V_CC = 1.2V to V_CC = 5.5V.
1998 Apr 20
3