74HC03DB Datasheet, PDF (3/8 Pages) NXP Semiconductors – Quad 2-input NAND gate

Philips Semiconductors
Quad 2-input NAND gate
PIN DESCRIPTION
PIN NO.
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A to 4A
1B to 4B
1Y to 4Y
GND
V_CC
NAME AND FUNCTION
data inputs
data inputs
data outputs
ground (0 V)
positive supply voltage
Product specification
74HC/HCT03
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS
OUTPUT
nA nB
nY
L
L
Z
L
H
Z
H
L
Z
H
H
L
Note
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
Fig.4 Functional diagram.
December 1990
Fig.5 Logic diagram (one gate).
3