74AUP1G18_15 Datasheet, PDF (3/22 Pages) NXP Semiconductors – Low-power 1-of-2 demultiplexer with 3-state deselected output

NXP Semiconductors
74AUP1G18
Low-power 1-of-2 demultiplexer with 3-state deselected output
6. Pinning information
6.1 Pinning
74AUP1G18
S1
6 1Y
GND 2
5 V_CC
A3
4 2Y
001aae822
Fig 2. Pin configuration SOT363
74AUP1G18
S1
6 1Y
GND 2
5 V_CC
A3
4 2Y
001aad869
Transparent top view
Fig 3. Pin configuration SOT886
6.2 Pin description
Table 3.
Symbol
S
GND
A
2Y
V_CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data select
ground (0 V)
data input
data output
supply voltage
data output
7. Functional description
Table 4.
Input
S
L
L
H
H
Function table^[1]
A
L
H
L
H
[1] H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
Output
1Y
L
H
Z
Z
74AUP1G18
S1
6 1Y
GND 2
5 V_CC
A3
4 2Y
001aad870
Transparent top view
Fig 4. Pin configuration SOT891,
SOT1115 and SOT1202
2Y
Z
Z
L
H
74AUP1G18
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 3 July 2012
© NXP B.V. 2012. All rights reserved.
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