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74ALS175 Datasheet, PDF (3/8 Pages) NXP Semiconductors – Quad D flip-flop
Philips Semiconductors
Quad D flip-flop
Product specification
74ALS175
LOGIC DIAGRAM
CP 9
VCC = Pin 16
GND = Pin 8
1
MR
D0
D1
D2
D3
4
5
12
13
DQ
CP
RD
DQ
CP
RD
DQ
CP
RD
DQ
CP Q
RD
32
Q0 Q0
67
Q1 Q1
11 10
Q2 Q2
14 15
Q3 Q3
FUNCTION TABLE
INPUTS
OUTPUTS
MR
CP
D
Qn
Qn
L
X
X
L
H
H
↑
h
H
L
H
↑
I
L
H
NOTES:
H = High-voltage level
h = High state must be present one setup time before the Low-to-High clock transition
L = Low-voltage level
l = Low state must be present one setup time before the Low-to-High clock transition
X = Don’t care
↑ = Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
PARAMETER
VCC
VIN
IIN
VOUT
IOUT
Tamb
Tstg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VIH
VIL
IIK
IOH
IOL
Tamb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
OPERATING
MODE
Reset (clear)
Load “1”
Load “0”
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to VCC
16
0 to +70
–65 to +150
LIMITS
MIN NOM MAX
4.5
5.0
5.5
2.0
0.8
–18
–0.4
8
0
+70
SF00721
UNIT
V
V
mA
V
mA
°C
°C
UNIT
V
V
V
mA
mA
mA
°C
1991 Feb 08
3