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74ABT74 Datasheet, PDF (3/5 Pages) NXP Semiconductors – Dual D-type flip-flop
Philips Semiconductors
Dual D-type flip-flop
Product specification
74ABT74
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
MIN TYP MAX
Tamb = –40°C
to +85°C
MIN MAX
VIK
Input clamp voltage
VCC = 4.5V; IIK = –18mA
–0.9 –1.2
–1.2
VOH High-level output voltage
VCC = 4.5V; IOH = –15mA; VI = VIL or VIH
2.5 2.9
2.5
VOL Low-level output voltage
VCC = 4.5V; IOL = 20mA; VI = VIL or VIH
0.35 0.5
0.5
II
Input leakage current
VCC = 5.5V; VI = GND or 5.5V
±0.01 ±1.0
±1.0
IOFF Power-off leakage current
VCC = 0.0V; VO or VI ≤ 4.5V
±5.0 ±100
±100
ICEX
IO
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC
Output current1
VCC = 5.5V; VO = 2.5V
5.0 50
50
–50 –75 –180 –50 –180
ICC
Quiescent supply current
VCC = 5.5V; VI = GND or VCC
2
50
50
∆ICC
Additional supply current per VCC = 5.5V; One data input at 3.4V, other
input pin2
inputs at VCC or GND
0.25 500
500
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
UNIT
V
V
V
µA
µA
µA
mA
µA
µA
AC ELECTRICAL CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25°C
VCC = +5.0V
MIN
TYP
MAX
Tamb = –40°C to +85°C
VCC = +5.0V ±0.5V
MIN
MAX
UNIT
fMAX
Maximum clock frequency
1
180
250
150
MHz
tPLH
Propagation delay
tPHL
CPn to Qn, Qn
1
1.0
3.0
4.2
1.0
1.0
2.5
3.5
1.0
4.7
4.0
ns
tPLH
Propagation delay
tPHL
Sn, Rn to Qn, Qn
3
1.0
3.4
4.9
1.0
1.0
2.9
4.5
1.0
6.2
5.2
ns
tOSHL
tOSLH1
Output to Output skew
An or Bn to Yn
4
0.5
0.6
0.6
ns
NOTE:
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same
device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (tOSHL) or LOW-to-HIGH (tOSLH);
parameter guaranteed by design.
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
SYMBOL
PARAMETER
tsu (H)
tsu (L)
th (H)
th (L)
tw (H)
tw (L)
tw (L)
trec
Setup time, high or low
Dn to CPn
Hold time, high or low
Dn to CPn
CPn pulse width,
high or low
SDn, RDn pulse width, low
Recovery time
SDn, RDn to CPn
WAVEFORM
1
1
1
3
2
Tamb = +25°C
VCC = +5.0V
MIN
TYP
2.6
1.4
2.4
1.4
0
–1.4
0
–1.4
1.7
1.0
1.7
1.0
2.0
1.3
LIMITS
Tamb = –40°C to +85°C
VCC = +5.0V ±0.5V
MIN
2.6
2.4
0
0
2.1
2.1
2.2
2.1
1.4
2.4
UNIT
ns
ns
ns
ns
ns
1995 Sep 22
3