74ABT651 Datasheet, PDF (3/7 Pages) NXP Semiconductors – Octal transceiver/register, inverting 3-State

Philips Semiconductors
Octal transceiver/register, inverting (3-State)
Product specification
74ABT651
FUNCTION TABLE
OEAB
OEBA
INPUTS
CPAB CPBA
SAB SBA
DATA I/O
An
Bn
OPERATING MODE
L
L
H
H or L H or L
X
X
H
↑
↑
X
X
Input
Input
Isolation
Store A and B data
X
H
H
H
↑
↑
H or L
X
X
↑
**
X
Input
Unspecified
output*
Store A, Hold B
Store A in both registers
L
L
X
H or L
↑
L
↑
↑
X
X
X Unspecified
**
output*
Input
Hold A, Store B
Store B in both registers
L
L
L
L
X
X
X
X
L
H or L
X
H
Output
Input
Real time B data to A bus
Stored B data to A bus
H
H
H
X
X
H
H or L
X
L
X
H
X
Input
Output
Real time A data to B bus
Store A data to B bus
H
L
H or L H or L
H
H
Output
Output
Stored A data to B bus
Stored B data to A bus
H=
L=
X=
↑=
*
**
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
LOGIC DIAGRAM
21
OEBA
3
OEAB
23
CPBA
22
SBA
1
CPAB
2
SAB
4
A0
1of 8 Channels
1D
C1
Q
1D
C1
Q
20
B0
5
A1
6
A2
7
A3
8
A4
9
A5
10
A6
11
A7
1995 Sep 06
DETAIL A X 7
3
19
B1
18
B2
17
B3
16
B4
15
B5
14
B6
13
B7
SA00098