PCF8576 Datasheet, PDF (29/40 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

Philips Semiconductors
Universal LCD driver for low multiplex
rates
Product specification
PCF8576
11 AC CHARACTERISTICS
V_DD = 2 to 9 V; V_SS = 0 V; V_LCD = V_DD − 2 V to V_DD − 9 V; T_amb = −40 to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
f_clk
t_clkH
t_clkL
t_PSYNC
t_SYNCL
t_PLCD
oscillator frequency on pin CLK
normal mode
power-saving mode
CLK HIGH time
CLK LOW time
SYNC propagation delay time
SYNC LOW time
driver delays with test loads
V_DD = 5 V; note 1
125 200 288 kHz
V_DD = 3.5 V
21 31 48 kHz
see Fig.21
1
−
−
µs
1
−
−
µs
−
−
400 ns
1
−
−
µs
V_LCD = V_DD − 5 V; see Fig.20 −
−
30 µs
Timing characteristics: I²C-bus; note 2; see Fig.22
t_SW
t_BUF
t_HD;STA
t_SU;STA
t_LOW
t_HIGH
t_r
t_f
C_B
t_SU;DAT
t_HD;DAT
t_SU;STO
tolerable spike width on bus
bus free time
START condition hold time
set-up time for a repeated START condition
SCL LOW time
SCL HIGH time
SCL and SDA rise time
SCL and SDA fall time
capacitive bus line load
data set-up time
data hold time
set-up time for STOP condition
−
−
4.7 −
4.0 −
4.7 −
4.7 −
4.0 −
−
−
−
−
−
−
250 −
0
−
4.0 −
100 ns
−
µs
−
µs
−
µs
−
µs
−
µs
1
µs
0.3 µs
400 pF
−
ns
−
ns
−
µs
Notes
1. At f_clk < 125 kHz, I²C-bus maximum transmission speed is derated.
2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to
V_IL and V_IH with an input voltage swing of V_SS to V_DD.
1998 Feb 06
SYNC
CLK
6.8 Ω
(2%)
3.3 k Ω
(2%)
VDD
0.5VDD
BP0 to BP3, and ^{1 nF}
S0 to S39
VDD
SDA,
SCL
1.5 k Ω
(2%)
VDD
MBE544
Fig.20 Test loads.
29