DAC1405D750_11 Datasheet, PDF (29/42 Pages) NXP Semiconductors – Dual 14-bit DAC, up to 750 Msps; 4x and 8x interpolating

NXP Semiconductors
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
REF.
BANDGAP
AGND
AGND
100 nF _GAPOUT
909 Ω
(1 %) _VIRES
Fig 11. Internal reference configuration
DAC
CURRENT
SOURCES
ARRAY
001aaj816
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with GAP_PD (register 00h[0]; see Table 10 “COMMon register (address 00h) bit
description”).
10.10.2 Full-scale current adjustment
The default full-scale current (I_O(fs)) is 20 mA but further adjustments can be made by the
user to both DACs independently via the serial interface from 1.6 mA to 22 mA, 10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (see Table 20 “DAC_A_Cfg_2
register (address 0Ah) bit description” and Table 21 “DAC_A_Cfg_3 register (address
0Bh) bit description”) and to DAC_B_GAIN COARSE[3:0] (see Table 23 “DAC_B_Cfg_2
register (address 0Dh) bit description” and Table 24 “DAC_B_Cfg_3 register (address
0Eh) bit description”) define the coarse variation of the full-scale current (see Table 39).
Table 39. I_O(fs) coarse adjustment
Default settings are shown highlighted.
DAC_GAIN_COARSE[3:0]
Decimal
Binary
0
0000
1
0001
2
0010
3
0011
4
0100
5
0101
6
0110
7
0111
8
1000
9
1001
10
1010
11
1011
12
1100
I_O(fs) (mA)
1.6
3.0
4.4
5.8
7.2
8.6
10.0
11.4
12.8
14.2
15.6
17.0
18.5
DAC1405D750
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 7 June 2011
© NXP B.V. 2011. All rights reserved.
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