SAA7283 Datasheet, PDF (25/36 Pages) NXP Semiconductors – Terrestrial Digital Sound Decoder TDSD3

Philips Semiconductors
Terrestrial Digital Sound Decoder (TDSD3)
Preliminary specification
SAA7283
SYMBOL
PARAMETER
CONDITIONS
VCO (MEASURED AT V_CLK PIN)
f_VCO
VCO frequency after DAC
calibration
VCO frequency after fine frequency
calibration
K_VCO
VCO slope
DAC_STEP
ItoQ
VCO calibrating DAC step size
in-phase to quadrature phase
accuracy
ϕ_j
VCO phase jitter
Clock recovery loop and crystal oscillator
f_SYS = 6552 MHz
(system I) or
f_SYS = 5.85 MHz
(system BGH)
system I
system B/G
note 4
XTAL
C_i
V_bias
input capacitance
DC bias voltage
OSC
V_osc(p-p)
oscillator voltage amplitude
(peak to peak value)
V_bias
G_v
C_o
DC bias voltage
small signal voltage gain
output capacitance
CRYSTAL SPECIFICATION (FUNDAMENTAL MODE)
f_i
crystal input frequency
C_L
load capacitance
C1
series capacitance
C0
parallel capacitance
S
pulling sensitivity
determined by C_L,
C1 and C0
R_r
R_DLD
resonance resistance
resonance resistance; drive level
dependency
X_a
T_range
X_j
X_d
ageing
temperature range
adjustment tolerance
drift
across T_range
CLOCK RECOVERY LOOP CURRENT SOURCE (CLKLPF)
I_LI
3-state leakage current at ^π⁄₂ phase 0.5 ≤ V_CLKLPF ≤
shift
V_DD − 0.5; note 5
ϕ_gm
phase comparator
transconductance
0.5 ≤ V_CLKLPF ≤
V_DD − 0.5; note 5
MIN.
TYP.
f_SYS − 75 −
f_SYS − 4 −
−139
−191
−50
−
−186
−255
+30
90
−
−
−
−
−
3.63
−
1.4
−
2.33
−
1.0
−
−
−
−
21
−
−26.25
8.192
15
−
−
−
−
−
−
−
−
−
−20
+25
−
−
−
−
−5
0
57
63.5
MAX.
UNIT
f_SYS + 75 kHz
f_SYS + 4 kHz
−232
−319
+50
−
kHz/V
kHz/V
kHz
deg
8.1
ns
10
pF
−
V
−
V
−
V
−
V/V
10
pF
−
MHz
−
pF
−
fF
5
pF
−
10^−6/pF
40
Ω
120
Ω
±5
10^−6/year
+70
°C
±30
10^−6
±30
10^−6
+5
µA
70
µA/rad
1996 Oct 24
25