UDA1350AH Datasheet, PDF (21/36 Pages) NXP Semiconductors – IEC 958 audio DAC

Philips Semiconductors
IEC 958 audio DAC
Preliminary specification
UDA1350AH
8.7.8 WRITABLE REGISTERS
8.7.8.1 Restoring L3 defaults
By writing to the 7FH register, all L3 control values are
restored to their default values. Only the L3 interface is
affected, the system will not be reset. Consequently
readable registers, which are not reset, can be affected.
8.7.8.2 Power-on
A 1-bit value to switch the DAC on and off.
Table 10 Power-on setting
PON
0
1
FUNCTION
power-down
power-on (default setting)
8.7.8.3 Slicer input selection
A 1-bit value to select an IEC 958 input channel.
Table 11 Slicer input selection
CHAN sel
FUNCTION
0
IEC 958 input from pin SPDIF0
(default setting)
1
IEC 958 input from pin SPDIF1
8.7.8.4 Clock source selection
A 1-bit value to select the source for clock regeneration,
either from the IEC 958 input or digital data input interface.
In the event that the IEC 958 input is used as a clock
source the UDA1350AH is clock master on the digital data
output and input interfaces.
Table 12 Clock source selection
IIS sel
0
1
FUNCTION
slave to audio sampling frequency of
IEC 958 input (default setting)
slave to audio sampling frequency of
digital data input interface
8.7.8.5 DAC input selection
A 1-bit value to select the data source, either the IEC 958
input or the digital data input interface.
Table 13 DAC input selection
SPD sel
0
1
FUNCTION
input from data input interface
input from IEC 958 (default setting)
8.7.8.6 Serial format selection
A 2-bit value to set the serial format for the digital data
output and input interfaces.
Table 14 Serial format settings
SFOR1 SFOR0
FUNCTION
0
0 I²S-bus (default settings)
0
1 LSB-justified, 16 bits
1
0 LSB-justified, 20 bits
1
1 LSB-justified, 24 bits
8.7.8.7 Filter mode selection
A 2-bit value to program the mode for the sound
processing filters of bass boost and treble.
Table 15 Filter mode settings
M1
M0
FUNCTION
0
0 flat (default setting)
0
1 minimum
1
0
1
1 maximum
8.7.8.8 Treble
A 2-bit value to program the treble setting in combination
with the filter mode settings. At f_s = 44.1 kHz the −3 dB
point for minimum setting is 3.0 kHz and the −3 dB point
for maximum setting is 1.5 kHz. The default value is ‘00’.
Table 16 Treble settings
LEVEL
TR1 TR0
FLAT (dB) MIN. (dB) MAX. (dB)
0
0
0
0
0
0
1
0
2
2
1
0
0
4
4
1
1
0
6
6
1999 Dec 16
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