SAA7188A Datasheet, PDF (21/36 Pages) NXP Semiconductors – Digital Video Encoder DENC2-M

Philips Semiconductors
Digital Video Encoder (DENC2-M)
Preliminary specification
SAA7188A
Table 28 Logic levels and function of PHRES
DATA BYTE
PHRES1
0
0
1
1
PHRES0
0
1
0
1
no reset
reset every two lines
reset every eight fields
reset every four fields
FUNCTION
Table 29 Subaddress 71 to 73
DATA BYTE
DESCRIPTION
BMRQ
beginning of MP request signal (RCM2)
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
first active pixel at analog outputs (corresponding input pixel coinciding with RCM2) at
BMRQ = 0F9H (115H)
EMRQ
end of MP request signal (RCM2)
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
last active pixel at analog outputs (corresponding input pixel coinciding with RCM2) at
EMRQ = 686H (690H)
Table 30 Subaddress 77 to 79
DATA BYTE
DESCRIPTION
BRCV
beginning of output signal on RCV2 pin
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
first active pixel at analog outputs (corresponding input pixel coinciding with RCV2) at
BRCV = 0F9H (115H)
ERCV
end of output signal on RCV2 pin
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
last active pixel at analog outputs (corresponding input pixel coinciding with RCV2) at
ERCV = 686H (690H)
Table 31 Subaddress 7A to 7D
DATA BYTE
DESCRIPTION
FLEN
length of a field = FLEN + 1, measured in half lines
valid range is limited to 524 to 1022 (FISE = 1) respectively 624 to 1022 (FISE = 0),
FLEN should be even
FAL
first active line after vertical blanking interval = FAL + 1, measured in lines
FAL = 0 coincides with the first field synchronization pulse
LAL
last active line before vertical blanking interval = LAL + 1, measured in lines
LAL = 0 coincides with the first field synchronization pulse
SUBADDRESSES
In subaddresses 5B, 5C, 5D, 5E and 62 all IRE values are rounded up.
1996 Jul 08
21