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PCF8820 Datasheet, PDF (21/60 Pages) NXP Semiconductors – 67 x 101 Grey-scale/ECB colour dot matrix LCD driver
Philips Semiconductors
67 × 101 Grey-scale/ECB colour dot matrix
LCD driver
Product specification
PCF8820
8.1 Description of the bit functions
Table 3 Instruction set bit functions
BIT
D7 to D0
TR7 to TR0
H2 to H0
DO
PD
V
Y4 to Y0
X6 to X0
D, E
MX
MY
RESET
STATE
−
−
000
0
1
0
0
0
00
0
0
VALUE
−
−
000
001
010
011
100
0
1
0
1
0
1
−
−
00
01
10
11
0
1
0
1
FUNCTION
data to be written to DDRAM
read-out value of sensor temperature
command page numbers
function and RAM
display setting
high voltage generator setting
grey-scale/colour
special features
data order when written to DDRAM
normal (see Fig.6)
swapped: DB7 <-> DB0, DB6 <-> DB1, etc.
operation mode
operating mode
Power-down mode; see Section 8.1.1
address mode
horizontal address mode: data is written to DDRAM (see Fig.10)
vertical address mode: data is written to DDRAM (see Fig.9)
Y-address of the DDRAM points to the rows; the address range is from
0 to 16 (10H); see Section 8.1.3
X-address of the DDRAM points to the columns; the address range is from
0 to 100 (64H)
display mode
display blank: using the value in grey-scale register 0
all display segments on: using the value in grey-scale register 3
normal mode: using the values of the four grey-scale registers appropriate to the
RAM data
inverse video: using the values in all four grey-scale registers as in normal mode
but with their values swapped (GS0 and GS3 values transposed, GS1 and GS2
values transposed)
horizontal address space mirroring; see Figs 7 and 8; see Table 10
disabled: data to DDRAM is written from left (X = 0) to right (X = 100)
enabled: data to DDRAM is written from right (X = 0) to left (X = 100)
vertical address space mirroring; see Table 10
disabled: normal display
enabled: data is immediately mirrored vertically on the LCD. The status of bit MY
takes effect when data is read from the DDRAM and when generating column
signals.
2000 Dec 07
21