TDA5153 Datasheet, PDF (20/28 Pages) NXP Semiconductors – Pre-amplifier for Hard Disk Drive HDD with MR-read/inductive write heads

Philips Semiconductors
Pre-amplifier for Hard Disk Drive (HDD)
with MR-read/inductive write heads
Preliminary specification
TDA5153
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I_o(max)(dif)
V_o(cm)
∆_{--∆---V-V---o-C-c--C-m--}
maximum differential output
current
common mode output voltage in
read mode
RDx, RDy
common mode DC supply rejection
in read mode
−
4
−
mA
1.0 1.5 2.0 V
−
20
−
dB
Z_o(n)(dif)
differential output impedance in
other modes (write, standby, sleep)
−
50
−
kΩ
Write characteristics
I_WR
∆I_WR
V_s(max)(p-p)
R_o(dif)
t_r, t_f
t_as
t_pd
α_cs
write current adjust range (in the
write drivers)
tolerance (excluding R_ext);
-I-^W-----^R-I--_R--^–--_W--I--^R-₍--_P-^W--_R---₎₍--^P---^R---⁾
maximum voltage swing
(peak-to-peak value)
differential output resistance
write current rise/fall time without
flip-flop (10% to 90%); note 8
write current asymmetry; note 9
propagation delay 50% of
(WDIx/WDIy) to 50% of (Wx, Wy)
channel separation
R_ext = 10 kΩ; 1 mA steps
20
I_WR(PR) = 35 mA
−
V_CC(WD) = 5 V
−
V_CC(WD) = 8 V (differential)
−
−
V_CC(WD) = 8 V; L_h = 150 nH,
−
R_h = 10 Ω; I_WR = 35 mA;
f = 20 MHz
percentage of t_r/t_f
−
(t_r, t_f and logic asymmetry)
write head short circuited; data −
flip-flop by passed
unselected head
−
35
51
mA
±7
−
%
−
8
V
−
13
V
200 −
Ω
−
1.8 ns
−
5
%
−
5
ns
45
−
dB
Switching characteristics
f_SCLK
∆V_o(cm)
t_rec(W-R)
t_sw(R)
t_off(R)
serial interface clock rate
−
output common mode DC voltage I_MR = 10 mA; I_WR = 35 mA
−
change from Read to Write modes
write to read recovery time
(AC and DC settling); note 10
from 50% of the rising edge of
R/W to steady state read-back
signal: AC and DC settling at
90% (without load at
RDx − RDy)
read amplifier OFF: d5 = 0 −
read amplifier ON: d5 = 1 −
head switching (in read mode),
standby to read active and MR
current change recovery time;
(AC and DC settling); note 11
from falling edge of SEN to
−
steady state read-back signal;
(without load at RDx − RDy)
read amplifier off time
from falling edge of R/W to
−
read head inactive
−
25
200 −
MHz
mV
3
4.5 µs
100 150 µs
3
4.5 µs
−
50
ns
1997 Jul 02
20