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| PSMN9R0-25MLC_15 Datasheet, PDF (2/14 Pages) NXP Semiconductors – N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology | |||
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NXP Semiconductors
PSMN9R0-25MLC
N-channel 25 V 8.65 m⦠logic level MOSFET in LFPAK33 using NextPower Technology
2. Pinning information
Table 2.
Pin
1
2
3
4
mb
Pinning information
Symbol Description
Simplified outline
S
source
S
source
S
source
G
gate
D
mounting base; connected to
drain
1234
SOT1210 (LFPAK33)
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
PSMN9R0-25MLC
LFPAK33
4. Limiting values
Description
Plastic single ended surface mounted package (LFPAK33);
4 leads
Version
SOT1210
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS
drain-source voltage
Tj = 25°C
VGS
gate-source voltage
ID
drain current
VGS = 10 V; Tmb = 25 °C; see Figure 1
VGS = 10 V; Tmb = 100 °C; see Figure 1
IDM
peak drain current
pulsed; tp ⤠10 µs; Tmb = 25 °C;
see Figure 4
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Tsld(M)
peak soldering temperature
VESD
electrostatic discharge voltage
Source-drain diode
Tmb = 25 °C; see Figure 2
MM (JEDEC JESD22-A115)
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
pulsed; tp ⤠10 µs; Tmb = 25 °C
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 55 A;
Vsup ⤠25 V; RGS = 50 â¦; unclamped;
see Figure 3
Min Max Unit
-
25 V
-20 20 V
-
55 A
-
39 A
-
219 A
-
45 W
-55 175 °C
-55 175 °C
-
260 °C
120 -
V
-
41 A
-
219 A
-
8.7 mJ
PSMN9R0-25MLC
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 â 15 June 2012
© NXP B.V. 2012. All rights reserved.
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