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PSMN057-200B Datasheet, PDF (2/9 Pages) NXP Semiconductors – N-channel TrenchMOS transistor
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Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PSMN057-200B
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
EAS
Non-repetitive avalanche
Unclamped inductive load, IAS = 35 A;
energy
tp = 100 µs; Tj prior to avalanche = 25˚C;
VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V;
IAS
Non-repetitive avalanche
current
MIN.
-
MAX.
300
UNIT
mJ
-
35
A
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-mb
Rth j-a
Thermal resistance junction
to mounting base
Thermal resistance junction
to ambient
CONDITIONS
Minimum footprint, FR4 board
TYP.
-
50
MAX.
0.6
-
UNIT
K/W
K/W
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(BR)DSS
VGS(TO)
RDS(ON)
IGSS
IDSS
Qg(tot)
Qgs
Qgd
td on
tr
td off
tf
Ld
Ls
Drain-source breakdown
voltage
Gate threshold voltage
Drain-source on-state
resistance
Gate source leakage current
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
VGS = 0 V; ID = 0.25 mA;
VDS = VGS; ID = 1 mA
VGS = 10 V; ID = 17 A
VGS = ±10 V; VDS = 0 V
VDS = 200 V; VGS = 0 V;
Tj = -55˚C
Tj = 175˚C
Tj = -55˚C
Tj = 175˚C
Tj = 175˚C
ID = 39 A; VDD = 160 V; VGS = 10 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 100 V; RD = 2.7 Ω;
VGS = 10 V; RG = 5.6 Ω
Resistive load
Internal drain inductance
Internal source inductance
Measured from tab to centre of die
Measured from source lead to source
bond pad
Ciss
Input capacitance
Coss
Output capacitance
Crss
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
MIN. TYP. MAX. UNIT
200 -
-
V
178 -
-
V
2.0 3.0 4.0 V
1.0 -
-
V
-
-
6
V
- 41 57 mΩ
-
- 165 mΩ
-
2 100 nA
- 0.03 10 µA
-
- 500 µA
- 96 - nC
- 13 - nC
- 37 50 nC
- 18 - ns
- 58 - ns
- 105 - ns
- 78 - ns
- 3.5 - nH
- 7.5 - nH
- 3750 - pF
- 385 - pF
- 180 - pF
December 2000
2
Rev 1.000
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