PH16030L Datasheet, PDF (2/12 Pages) NXP Semiconductors – N-channel TrenchMOS-TM logic level FET

Philips Semiconductors
PH16030L
N-channel TrenchMOS™ logic level FET
3. Ordering information
Table 2: Ordering information
Type number
Package
Name
Description
PH16030L
LFPAK
plastic single-ended surface mounted package; 4 leads
4. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
V_DS
V_DGR
V_GS
I_D
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
I_DM
peak drain current
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
25 °C ≤ T_j ≤ 150 °C
25 °C ≤ T_j ≤ 150 °C; R_GS = 20 kΩ
T_mb = 25 °C; V_GS = 10 V; Figure 2 and 3
T_mb = 100 °C; V_GS = 10 V; Figure 2
T_mb = 25 °C; pulsed; t_p ≤ 10 µs; Figure 3
T_mb = 25 °C; Figure 1
I_S
source (diode forward) current (DC) T_mb = 25 °C
I_SM
peak source (diode forward) current T_mb = 25 °C; pulsed; t_p ≤ 10 µs
Avalanche ruggedness
E_DS(AL)S non-repetitive drain-source
avalanche energy
unclamped inductive load; I_D = 21 A;
t_p = 0.1 ms; V_DD ≤ 25 V; R_GS = 50 Ω;
V_GS = 10 V; starting at T_j = 25 °C
Version
SOT669
Min
Max Unit
-
30
V
-
30
V
-
±15
V
-
38
A
-
24
A
-
100
A
-
41.6 W
−55
+150 °C
−55
+150 °C
-
38
A
-
100
A
-
44
mJ
9397 750 14431
Product data sheet
Rev. 01 — 24 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2 of 12