HEF4508B Datasheet, PDF (2/9 Pages) NXP Semiconductors – Dual 4-bit latch

Philips Semiconductors
Dual 4-bit latch
Product specification
HEF4508B
MSI
DESCRIPTION
The HEF4508B is a dual 4-bit latch, which consists of two
identical independent 4-bit latches with separate strobe
(ST), master reset (MR), output-enable input (EO) and
3-state outputs (O).
With the ST input in the HIGH state, the data on the D
inputs appear at the corresponding outputs provided EO is
LOW. Changing the ST input to the LOW state locks the
data into the latch. A HIGH on the reset line forces the
outputs to a LOW level regardless of the state of the ST
input. The 3-state outputs are controlled by the
output-enable input. A HIGH on EO causes the outputs to
assume a high impedance OFF-state regardless of other
input conditions. This allows the outputs to interface
directly with bus orientated systems. When EO is LOW the
contents of the latches are available at the outputs.
Fig.1 Functional diagram.
FAMILY DATA, I_DD LIMITS category MSI
See Family Specifications
January 1995
2