HEF4043B_15 Datasheet, PDF (2/14 Pages) NXP Semiconductors – Quad R/S latch with 3-state outputs

NXP Semiconductors
5. Functional diagram
HEF4043B
Quad R/S latch with 3-state outputs
4 1S
3 1R
1Q 2
6 2S
7 2R
12 3S
11 3R
2Q 9
3-STATE
OUTPUTS
3Q 10
14 4S
15 4R
5 OE
Fig 1. Functional diagram
4Q 1
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6. Pinning information
6.1 Pinning
nS
nQ
nR
OE
to other latches
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Fig 2. Logic diagram for one latch
Fig 3. Pin configuration
HEF4043B
4Q 1
1Q 2
1R 3
1S 4
OE 5
2S 6
2R 7
V_SS 8
16 VDD
15 4R
14 4S
13 n.c.
12 3S
11 3R
10 3Q
9 2Q
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HEF4043B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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