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BUK7K25-40E_15 Datasheet, PDF (2/13 Pages) NXP Semiconductors – Dual N-channel TrenchMOS standard level FET
NXP Semiconductors
BUK7K25-40E
Dual N-channel TrenchMOS standard level FET
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1
S1
source1
2
G1
gate1
3
S2
source2
4
G2
gate2
5
D2
drain2
6
D2
drain2
7
D1
drain1
8
D1
drain1
Simplified outline
8765
Graphic symbol
D1 D1
D2 D2
1234
LFPAK56D (SOT1205)
S1 G1 S2 G2
mbk725
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
BUK7K25-40E
LFPAK56D
Description
Plastic single ended surface mounted package (LFPAK56D); 8
leads
Version
SOT1205
7. Marking
Table 4. Marking codes
Type number
BUK7K25-40E
Marking code
72540E
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
VDGR
drain-gate voltage
RGS = 20 kΩ; Tj ≥ 25 °C; Tj ≤ 175 °C
VGS
gate-source voltage
Tj ≤ 175 °C; DC
ID
drain current
VGS = 10 V; Tmb = 25 °C; Fig. 1
Tmb = 100 °C; VGS = 10 V; Fig. 1
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
BUK7K25-40E
All information provided in this document is subject to legal disclaimers.
Product data sheet
23 April 2013
Min Max Unit
-
40
V
-
40
V
-20 20
V
-
27
A
-
19
A
-
107 A
-
32
W
© NXP B.V. 2013. All rights reserved
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