BST82 Datasheet, PDF (2/12 Pages) NXP Semiconductors – N-channel enhancement mode vertical D-MOS transistor

Philips Semiconductors
N-channel enhancement mode vertical
D-MOS transistor
Product specification
BST82
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in SOT23
envelope and designed for use as
Surface Mounted Device (SMD) in
thin and thick-film circuits for
telephone ringer and for application
with relay, high-speed and
line-transformer drivers.
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No second breakdown
• Low R_DS(on)
QUICK REFERENCE DATA
Drain-source voltage
Drain-source voltage (non-repetitive peak;
t_p ≤ 2 ms)
Gate-source voltage (open drain)
Drain current (DC)
Total power dissipation up to T_amb = 25 °C
Drain-source ON-resistance
I_D = 150 mA; V_GS = 5 V
Transfer admittance
I_D = 175 mA; V_DS = 5 V
PINNING - SOT23
1 = gate
2 = source
3 = drain
V_DS
max.
V_DS(SM) max.
80 V
100 V
±V_GSO
I_D
P_tot
max.
max.
max.
20 V
175 mA
300 mW
R_DS(on)
typ.
max.
7Ω
10 Ω
 Y_fs typ. 150 mS
PIN CONFIGURATION
handbook, halfpage
3
handbook, 2 columns
d
1
Top view
2
MSB003
g
MBB076 - 1 _s
Marking: 02p
Fig.1 Simplified outline and symbol.
April 1995
2