English
Language : 

82B715 Datasheet, PDF (2/10 Pages) NXP Semiconductors – I2C bus extender
Philips Semiconductors
I2C bus extender
Preliminary specification
82B715
DESCRIPTION
The 82B715 is a bipolar integrated circuit intended for application in
I2C bus systems.
While retaining all the operating modes and features of the I2C
system it permits extension of the practical separation distance
between components on the I2C bus by buffering both the data
(SDA) and the clock (SCL) lines.
The I2C bus capacitance limit of 400pF restricts practical
communication distances to a few meters. Using one 82B715 at
each end of longer cables reduces the cable loading capacitance on
the I2C bus by a factor of 10 times and may allow the use of low
cost general purpose wiring to extend bus lengths.
FEATURES
• Dual, bi-directional, unity voltage gain buffer
• I2C bus compatible
• Logic signal levels may include both supply and ground
• X10 impedance transformation
• Wide supply voltage range
QUICK REFERENCE DATA
SYMBOL
VCC
ICC
Iline
Vin
Vout
Zin/Zout
Tamb
PARAMETER
Supply voltage
Quiescent current
Output sink capability
Input voltage range
Output voltage range
Impedance transformation
Temperature range
PIN CONFIGURATIONS
8-Pin Dual In-Line or SO
82B715
N.C. 1
LX 2
SX 3
GND 4
8 VCC
7 LY
6 SY
5 N.C.
SU00290
PINNING
PIN
SYMBOL
1 N.C.
2 LX
3 SX
4 GND
5 N.C.
6 SY
7 LY
8 VCC
FUNCTION
Buffered Bus, LDA or LCL
I2C Bus, SDA or SCL
Negative Supply
I2C Bus, SCL or SDA
Buffered Bus, LCL or LDA
Positive Supply
MIN.
4.5
30
0
0
8
–40
LIMITS
TYP.
16
MAX.
12
VCC
VCC
10
13
+85
UNIT
V
mA
mA
V
V
°C
ORDERING INFORMATION
DESCRIPTION
8-pin plastic dual In-line package
8-pin plastic small outline package
ORDER CODE
P82B715P N
P82B715T D
NOTE:
1. For applications requiring, 3V operation and additional buffer performance, see P82B96 Data Sheet.
DRAWING NUMBER
SOT97-1
SOT96-1
1998 Jan 09
2