74HC_HCT42_CNV_15 Datasheet, PDF (2/6 Pages) NXP Semiconductors – BCD to decimal decoder (1-of-10)

Philips Semiconductors
BCD to decimal decoder (1-of-10)
Product specification
74HC/HCT42
FEATURES
• Mutually exclusive outputs
• 1-of-8 demultiplexing capability
• Outputs disabled for input codes above nine
• Output capability: standard
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT42 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT42 decoders accept four active HIGH BCD
inputs and provide 10 mutually exclusive active LOW
outputs. The active LOW outputs facilitate addressing
other MSI circuits with active LOW input enables.
The logic design of the “42” ensures that all outputs are
HIGH when binary codes greater than nine are applied to
the inputs.
The most significant input (A₃) produces an useful inhibit
function when the “42” is used as a 1-of-8 decoder. The A₃
input can also be used as the data input in an 8-output
demultiplexer application.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ t_PLH
C_I
C_PD
propagation delay A_n to Y_n
input capacitance
power dissipation capacitance per package
C_L = 15 pF; V_CC = 5 V
notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
TYPICAL
HC
14
3.5
37
HCT
17
3.5
37
UNIT
ns
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2